Computers essentially understand machine codes which are long binary sequences of 0 and 1. For every unique operation, there is a unique sequence of 0s and 1s which makes the processor perform the required operation. As a programmer, writing code in machine language is very tedious and you wouldn’t want to spend time remembering those codes either.
Assembly language is a low-level language which is architecture specific, i.e. different architectures will have different Mnemonics defined for them. A Mnemonic is kind of a tag which helps you remember the characteristics or role of something. Eg ADD, SUB, MUL. These Mnemonics along with the operand in machine language are hexadecimal numbers. E.g. CE, 8F which are called opcodes. Eg (In 8081) DEC A has opcode 14. Similarly, ADD A, R2 has opcode 2A.
In 8051 there are different ways in which you can address or use these instructions. These are called addressing modes.
Immediate addressing mode
In this addressing mode, the data is specified in the instruction itself.
The # symbol specifies the value being data.
E.g. MOV A, #35H (Value 35 is moved in Accumulator).
MOV DPTR, #3000H (value 3000 is moved in Accumulator).
Register addressing mode
In this addressing mode, data is specified using registers in the instruction. The permitted registers are A, R7 to R0 of each memory bank.
E.g. MOV A, R0
If R0 contains 25H. Then the value 25H will be copied in A.
Data transfer between two RAM registers is not allowed
E.g. MOV Rx, Ry
Direct addressing mode.
In this addressing mode, the address of the operand is specified in the instruction.
MOV A, 35H
Contents of RAM location 35H are copied in A
MOV 20H, 30H
Contents of RAM location 30H are copied to the location of 30H
Indirect addressing mode
In this addressing mode, the address of the operand is specified in a register. Only R1 and R0 can be used for this purpose and are called data pointers. Using this addressing mode internal as well as external RAM can be accessed.
E.g. MOV R0, 30h
MOV A, @R0
A gets the value stored at location 30h.
For external RAM
MOVX A, @DPTR (X indicates eternal RAM)
DPTR can be used to point to 16-bit addresses since DPTR is 16-bit in size.
Indexed Addressing mode.
In this addressing mode, the address is indirectly specified as the sum of A and DPTR or A and PC.
E.g. MOVC A, @A+DPTR where C indicates code memory.
Here content of memory location pointed by A+DPTR is moved to A.
The following are the different data move, Arithmetic, logical, Call and jump, and Boolean instruction. Before we go into these instructions, I will be using the following mnemonics acronyms.
- add – Address of internal RAM from 00h to FFh
- n – Any immediate data eg. #33H, #2Fh, #04H etc
- Rr – Any of the eight registers for R0 to R7, in the selected bank
- Rp – Pointing registers i.e either R0 or R1 in the selected bank.
- ladd – Long address (16 bits).
- sadd – Short address (11 bits).
- radd – Relative address (A signed number within the range -128d to +127d from the current position of Program counter).
Data moves
| Operation | Explanation | Bytes | Cycles |
|---|---|---|---|
| MOV A, Rr | Content of register (either R0, R1 .... R7) will be copied in accumulator | 1 | 1 |
| MOV A, add | data contained at the address will be copied to accumulator. eg MOV A, 20H | 2 | 1 |
| MOV A, @Rp | Content of memory location pointed by Rp will be Copied to A | 1 | 1 |
| MOV A, #n | Immediate data will be copied to Accumulator e.g. MOV A, #10h | 2 | 1 |
| MOV Rr, A | Content of Accumulator will be copied to register | 1 | 1 |
| MOV Rr, add | Content of address will be copied to register | 2 | 2 |
| MOV Rr, #n | Immediate data will be copied to Register | 2 | 1 |
| MOV add, A | Content of Accumulator will be copied to specified address | 2 | 1 |
| MOV add, Rr | Content of register will be copied to the specified address | 2 | 2 |
| MOV add1, add2 | Content stored in add2 will be copied to add1 | 3 | 2 |
| MOV add, @Rp | Content of memory location pointed by Rp will be copied at the specified address | 2 | 2 |
| MOV add, #n | immediate data will be moved to specified address | 3 | 2 |
| MOV @Rp, A | Content of accumulator will be copied to the memory location pointed by Rp. | 1 | 1 |
| MOV @Rp, add | content of specified address will be copied to the memory location pointed by Rp. | 2 | 2 |
| MOV @Rp, #n | Immediate data will be copied to the memory location pointed by Rp. | 2 | 1 |
| MOV DPTR, #nn | Immediate data of 2 bytes will be stored in DPTR. E.g MOV DPTR, #4000H | 3 | 2 |
| MOVC A, @A+DPTR | Content of memory location pointed by the address of A+DPTR will be copied in accumulator. | 1 | 2 |
| MOVC A, @A+PC | Content of memory location pointed by the address of A+PC will be copied in accumulator. | 1 | 2 |
| MOVX A, @DPTR | Content of Memory location point by DPTR will be copied to A, (External memory). | 1 | 2 |
| MOVX A, @Rp | Content of Memory location point by Rp will be copied to A, (External memory). | 1 | 2 |
| MOVX @Rp, A | Content of A will be copied to the memory location point by Rp. (External memory). | 1 | 2 |
| MOVX @DPTR, A | Content of A will be copied to the memory location point by DPTR. (External memory) | 1 | 2 |
| POP add | Content point by SP is poped to the address and SP is decremented by 1. | 2 | 2 |
| PUSH add | SP is incremented by 1 and content of address is pushed into the stack. | 2 | 2 |
| XCH A, Rr | Content of A and Rr are exchanged. | 1 | 1 |
| XCH A, add | Content of A and add are exchanged. | 2 | 1 |
| XCH A, @Rp | Content of A and memory location pointed by Rp are exchanged. | 1 | 1 |
Arithematic operations
| Operation | Explanation | Bytes | Cycle |
|---|---|---|---|
| ADD A, Rr | A = A + Content of register (either R0, R1 .... R7). | 1 | 1 |
| ADD A, add | A = A + Content stored at the specified address. | 2 | 1 |
| ADD A, @Rp | A = A + Content of memory location pointed by Rp. | 1 | 1 |
| ADD A, #n | A = A + immediate data. | 2 | 1 |
| ADDC A, Rr | Same as basic addition with carry being added. | 1 | 1 |
| ADDC A, add | Same as basic addition with carry being added. | 2 | 1 |
| ADDC A, @Rp | Same as basic addition with carry being added. | 1 | 1 |
| ADDC A, #n | Same as basic addition with carry being added. | 2 | 1 |
| DA A | Decimal adjust accumulator. | 1 | 1 |
| DEC A | Content of A is decremented by 1. | 1 | 1 |
| DEC Rr | Content of Rr is decremented by 1. | 1 | 1 |
| DEC add | Content of specified address is decremented by 1. | 2 | 1 |
| DEC @Rp | Content of memory location pointed by Rp is decremented by 1. | 1 | 1 |
| DIV AB | A is divided by B. Quotient is stored in A. Remainder in B. | 1 | 4 |
| INC A | Content of A is incremented by 1. | 1 | 1 |
| INC Rr | Content of Rr is incremented by 1. | 1 | 1 |
| INC add | Content of specified address is incremented by 1. | 2 | 1 |
| INC @Rp | Content of memory location pointed by Rp is incremented by 1. | 1 | 1 |
| INC DPTR | DPTR is incremented by 1. | 1 | 2 |
| MUL AB | Multiplies A and B. Lower byte is stored in A and higher byte in B. | 1 | 4 |
| SUBB A, Rr | Content of A is subtracted with Rr along with borrow. | 1 | 1 |
| SUBB A, add | Content of A is subtracted with content of specified address. | 2 | 1 |
| SUBB A, @Rp | Content of A is subtracted with content of memory location pointed by Rp. | 1 | 1 |
| SUBB A, #n | Content of A is subtracted with immediate data (#n, e.g. SUBB A, #40h). | 2 | 1 |
CALL and JUMP instructions
| Operation | Explanation | Bytes | Cycles |
|---|---|---|---|
| ACALL sadd | Used to 'call' subroutine. Can call within 11 bit address range i.e 2K. | 2 | 2 |
| CJNE A, add, radd | Compare content of A with content of specified address, Jump if they are not equal. | 3 | 2 |
| CJNE A, #n, radd | Compare A with immediate data. Jump if not equal. | 3 | 2 |
| CJNE Rr, #n, radd | Compare content of Register with immediate. Jump if not equal. | 3 | 2 |
| CJNE @Rp, #n, radd | Compare content of memory location pointed by Rp with immediate data. jump if not equal. | 3 | 2 |
| DJNZ Rr, radd | Decrement Rr by 1. Jump if it is not equal to zero. | 2 | 2 |
| DJNZ add, radd | Decrement Rr by 1. Jump if it is not equal to zero. | 3 | 2 |
| LCALL, ladd | Used to 'call' subroutine. Can call within 16 bit address range i.e 64K. | 3 | 2 |
| AJMP sadd | Absolute jump to any location withing 11 bit address. | 2 | 2 |
| LJMP ladd | Long jump to the specified long address (0000-FFFFh). | 3 | 2 |
| SJMP radd | Short jump to the specified relative address. | 2 | 2 |
| JMP @A+DPTR | Jumps to the location pointed by A+DPTR. | 1 | 2 |
| JC radd | Jump if carry flag is set. | 2 | 2 |
| JNC radd | Jump if carry flag is not set. | 2 | 2 |
| JB b, radd | Jump if bit is set. | 3 | 2 |
| JNB b, radd | Jump if bit is not set. | 3 | 2 |
| JBC b, radd | Jump if bit is set. Clears the bit after jump. If bit is already cleared, it continues with the next instruction. | 3 | 2 |
| JZ radd | Jump if zero flag is set. | 2 | 2 |
| JNZ radd | Jump if zero flag is not set. | 2 | 2 |
| RET | Returns from subroutine. Used at the end of a subroutine. | 1 | |
| RETI | Returns from interrupt subroutine. | 1 | 2 |
Logical Operations
| Operation | Explanation | Bytes | Cycles |
|---|---|---|---|
| ANL A, Rr | A (AND) Rr (either of R0 to R7). Result stored in A. | 1 | 1 |
| ANL A, add | A (AND) add. Result stored in A. | 2 | 1 |
| ANL A, @Rp | A (AND) @Rp. | 1 | 1 |
| ANL A, #n | A (AND) immediate data. | 2 | 1 |
| ANL add, A | add (AND) A. Result stored in specified address. | 2 | 1 |
| ANL add, #n | add (AND) immediate data. Result stored in specified address. | 3 | 2 |
| CLR A | Accumulator is cleared i.e. A = 00h. | 1 | 1 |
| CPL A | Contents of A are complemented. | 1 | 1 |
| ORL A, Rr | A (OR) Rr. Result stored in A. | 1 | 1 |
| ORL A, add | A (OR) add. Result stored in A. | 2 | 1 |
| ORL A, @Rp | A (OR) @Rp. Result stored in A. | 1 | 1 |
| ORL A, #n | A (OR) immediate data. Result stored at A. | 2 | 1 |
| ORL add, A | add (OR) Rr. Result stored at specified address. | 2 | 1 |
| ORL add, #n | add (OR) immediate data. Result stored at specified address. | 3 | 2 |
| XRL A, Rr | A (XOR) Rr. Result stored in A. | 1 | 1 |
| XRL A, add | A (XOR) add. Result stored in A. | 2 | 1 |
| XRL A, @Rp | A (XOR) @Rp. Result stored in A. | 1 | 1 |
| XRL A, #n | A (XOR) Immediate data. Result stored in A. | 2 | 1 |
| XRL add, A | add (XOR) A. Result stored at specified address. | 2 | 1 |
| XRL add, #n | add (XOR) immediate data. Result stored at specified address. | 3 | 2 |
| NOP | No operation. PC is incremented by 1. | 1 | 1 |
| RL A | Rotate content of accumulator to the left by 1. | 1 | 1 |
| RLC A | Rotate content of accumulator along with carry to the left by 1. | 1 | 1 |
| RR A | Rotate content of accumulator to the right by 1. | 1 | 1 |
| RRC A | Rotate content of accumulator along with carry to the right by 1. | 1 | 1 |
| SWAP A | Swap lower 4 bits with upper 4 bits of accumulator. | 1 | 1 |
Boolean Operation
| Operation | Explanation | Bytes | Cycles |
|---|---|---|---|
| ANL C, Bit | Carry flag (AND) with specified bit. | 2 | 2 |
| CLR C | Carry flag is cleared. | 1 | 1 |
| CLR Bit | Specified bit is cleared. | 2 | 1 |
| CPL C | Carry flag is complemented. | 1 | 1 |
| CPL Bit | Specified bit is complemented. | 2 | 1 |
| ORL C, Bit | Carry flag (OR) specified bit. | 2 | 2 |
| Mov C, Bit | Value of bit (0 or 1) is moved to carry flag. | 2 | 1 |
| Mov Bit, C | Value if carry flag is moved to specified bit. | 2 | 2 |
| SETB C | Carry flag is set. | 1 | 1 |
| SETB Bit | Specified bit is set. | 2 | 1 |
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